February 25, 2021
University of Alberta
ABSTRACT: CMOS based computers cannot be made substantially more energy efficient or faster. Fast, low power field controlled computing schemes believed capable of reviving Moore’s law have not been physically realizable, until now. In such an approach binary information is encoded in spatial charge arrangements among quantum dots. Available quantum dots had been too large, too irregular, and too prone to debilitating charge trap effects. By reducing the quantum dot to a single silicon atom we have made the single electron charging energy very large resulting in dramatically improved noise immunity while also gaining near perfect homogeneity of components and eliminating charge traps. These structures are absolutely stable to over 200 C. And crucially, the silicon atom printing process has been automated and rendered virtually error free.
We will discuss how the atom-scale circuitry works and why it consumes little power (“Binary Atomic Silicon Logic”, Nature Electronics, 1, 636-643). Atom defined binary wires will be shown. These transmit information extremely rapidly and without the use of conventional current and as a result experience virtually no I2R heating. We will also show a working binary logic gate.
The A.I. automated fabrication process and atomic editing will be explained. Progress toward the merging of regular CMOS with atom scale circuitry will be shown. This hybrid CMOS/Atom approach minimizes time to deployment. We can use ordinary CMOS circuitry where it is adequate and deploy the atom circuitry as embedded enhancements to reduce power and or increase speed, or, to achieve all-new functions. Three applications will exemplify the advantages of this approach:
We will explain how electrons confined within multi-stable potentials can interact and spontaneously rearrange to embody a kind of Boltzmann machine (Phys. Rev. Lett., 121, 166801). A common element in this and other projects is our 2 atom, 1 electron bit. Such a bit can be biased to yield a preferred occupation of one side or the other of the double well, thereby spatially mapping binary 0 and 1 states. The “bit energy” of ~100 meV is of ideal magnitude: information is thermally robust, yet not overly confined as it is in today’s computers. Atom-defined SETs (single electron transistors) of complete uniformity can transduce spatial electron mapping to a current that can drive ordinary CMOS.
The low power consumption of our approach will be illustrated by simulating an atom-defined version of the MXU (matrix multiplication unit) within the Google TPU. Clocking power is reduced 10,000x at 1 GHz. Alternatively, by allowing today’s power consumption (limited to 100 W/cm2) clocking of 1 THz becomes achievable.
ABOUT: Robert Wolkow is a Professor in the Department of Physics, iCORE Chair of Nanoscale Information and Communications Technology at the University of Alberta and Fellow of the Royal Society of Canada. He is also the Principal Research Officer and Nanoelectronics Program Coordinator at the National Institute for Nanotechnology (NINT), AITF Industrial Chair in Atom Scale Fabrication and CTO of Quantum Silicon Inc. He received his BSc from the University of Waterloo, his PhD from the University of Toronto and did postdoctoral work at the IBM TJ Watson Research Centre before becoming a staff scientist at Bell Laboratories. He has received multiple awards for outstanding achievement, most recently the ASTech Outstanding Leadership in Alberta technology 2015, Innovation Patent Award 2017, Innovation Makes Sense Spin Off Award 2015, Innovation Makes Sense Patent Award 2016, and the AVS Nanotechnology Recognition award for 2020.